View LT1885_1117711.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt1884/LT1885 1 the lt ? 1884/LT1885 op amps bring high accuracy input performance to amplifiers with rail-to-rail output swing while providing faster response than other precision am- plifiers. input offset voltage is trimmed to less than 50 m v and the low drift maintains this accuracy over the operat- ing temperature range. input bias currents are an ultralow 400pa maximum. the amplifiers work on any total power supply voltage between 2.7v and 36v (fully specified from 5v to 15v). output voltage swings to within 40mv of the negative supply and 220mv of the positive supply make these amplifiers good choices for low voltage single supply operation. slew rates of 1v/ m s with a supply current of less than 1ma per amplifier give superior response and settling time performance in a low power precision amplifier. the dual lt1884 is available with standard pinouts in 8-pin so and pdip packages. the quad LT1885 is also in the standard pinout 14-pin so package. n thermocouple amplifiers n bridge transducer conditioners n instrumentation amplifiers n battery-powered systems n photo current amplifiers n precision integrators n precision current sources , ltc and lt are registered trademarks of linear technology corporation. n offset voltage: 50 m v max (lt1884a) n input bias current: 400pa max (lt1884a) n offset voltage drift: 0.8 m v/ c max n rail-to-rail output swing n operates with single or split supplies n open-loop voltage gain: 1 million min n 1ma maximum supply current per amplifier n slew rate: 1v/ m s n standard pinouts dual/quad rail-to-rail output, picoamp input precision op amps input fault protected instrumentation amplifier features descriptio u applicatio s u typical applicatio u + + + + 1884 ta01 r g/2 r g/2 22pf trim for ac cmrr 10k 1/4 LT1885 out ?n guard +in 1/4 LT1885 1/4 LT1885 1/4 LT1885 10k 1m 1m 3 5 10k 10k 9.76k 500 trim first for dc cmrr 10k gain = 2?0k r g 10pf
lt1884/LT1885 2 supply voltage (v + to v C ) ....................................... 40v differential input voltage (note 2) ......................... 10v input voltage .................................................... v + to v C input current (note 2) ........................................ 10ma output short-circuit duration (note 3) ............ indefinite order part number s8 part marking t jmax = 150 c, q ja = 130 c/w (n8) t jmax = 150 c, q ja = 190 c/w (s8) consult factory for military grade parts. 1884 1884a LT1885cs LT1885is (note 1) absolute axi u rati gs w ww u package/order i for atio uu w operating temperature range (note 4) .. C 40 c to 85 c specified temperature range (note 5) ... C 40 c to 85 c maximum junction temperature .......................... 150 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c 1884i 1884ai order part number lt1884cn8 lt1884cs8 lt1884acn8 lt1884acs8 lt1884in8 lt1884is8 lt1884ain8 lt1884ais8 1 2 3 4 8 7 6 5 top view v + out b in b +in b out a in a +in a v s8 package 8-lead plastic so n8 package 8-lead pdip a b top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a in a +in a v + +in b in b out b out d in d +in d v +in c in c out c a d c b t jmax = 150 c, q ja = 110 c/w the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. single supply operation v ee = 0, v cc = 5v; v cm = v cc /2 unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage (lt1884a) 25 50 m v 0 c < t a < 70 c l 85 m v C40 c < t a < 85 c l 110 m v input offset voltage (lt1884/LT1885) 30 80 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 150 m v input offset voltage drift (note 6) 0 c < t a < 70 c l 0.3 0.8 m v/ c C40 c < t a < 85 c l 0.3 0.8 m v/ c i os input offset current (lt1884a) 100 300 pa 0 c < t a < 70 c l 400 pa C40 c < t a < 85 c l 500 pa input offset current (lt1884/LT1885) 150 900 pa 0 c < t a < 70 c l 1200 pa C40 c < t a < 85 c l 1400 pa electrical characteristics
lt1884/LT1885 3 the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. single supply operation v ee = 0, v cc = 5v; v cm = v cc /2 unless otherwise noted. (note 5) symbol parameter conditions min typ max units i b input bias current (lt1884a) 100 400 pa 0 c < t a < 70 c l 500 pa C40 c < t a < 85 c l 600 pa input bias current (lt1884/LT1885) 150 900 pa 0 c < t a < 70 c l 1200 pa C40 c < t a < 85 c l 1400 pa input noise voltage 0.1hz to 10hz 0.4 m v p-p e n input noise voltage density f = 1khz 9.5 nv/ ? hz i n input noise current density f = 1khz 0.05 pa/ ? hz v cm input voltage range v ee + 1.0 v cc C 1.0 v l v ee + 1.2 v cc C 1.2 v cmrr common mode rejection ratio 1v < v cm < 4v 108 128 db 1.2v < v cm < 3.8v l 106 db psrr power supply rejection ratio v ee = 0, v cm = 1.5v 0 c < t a < 85 c, 2.7v < v cc < 32v l 108 132 db t a = C 40 c, 3v < v cc < 32v 108 132 db minimum operating supply voltage l 2.4 2.7 v a vol large-signal voltage gain r l = 10k; 1v < v out < 4v 500 1600 v/mv l 350 v/mv r l = 2k; 1v < v out < 4v 400 800 v/mv l 300 v/mv r l = 1k; 1v < v out < 4v 300 400 v/mv l 200 v/mv v ol output voltage swing low no load l 20 40 mv i sink = 100 m a l 25 50 mv i sink = 1ma l 70 150 mv i sink = 5ma l 270 600 mv v oh output voltage swing high no load l 120 220 mv (referred to v cc )i source = 100 m a l 130 230 mv i source = 1ma l 180 300 mv i source = 5ma l 360 600 mv i s supply current per amplifier v cc = 3v 0.45 0.65 0.85 ma l 1.30 ma v cc = 5v 0.50 0.65 0.9 ma l 1.4 ma v cc = 12v 0.50 0.70 1.0 ma l 1.5 ma i sc short-circuit current v out short to gnd l 15 30 ma v out short to v cc l 15 30 ma gbw gain-bandwidth product f = 20khz 1.2 2 mhz t s settling time 0.01%, v out = 1.5v to 3.5v, 10 m s a v = C1, r l = 2k sr + positive slew rate a v = C 1 0.45 0.9 v/ m s l 0.36 v/ m s sr C negative slew rate a v = C 1 0.35 0.7 v/ m s l 0.25 v/ m s electrical characteristics
lt1884/LT1885 4 the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. single supply operation v ee = 0, v cc = 5v; v cm = v cc /2 unless otherwise noted. (note 5) symbol parameter conditions min typ max units d v os offset voltage match (lt1884a) 30 70 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 160 m v offset voltage match (lt1884/LT1885) (note 7) 35 125 m v 0 c < t a < 70 c l 195 m v C40 c < t a < 85 c l 235 m v offset voltage match drift (notes 6, 7) l 0.4 1.2 m v/ c d i b + noninverting bias current match 200 600 pa (lt1884a) 0 c < t a < 70 c l 700 pa C40 c < t a < 85 c l 850 pa noninverting bias current match (notes 7, 9) 250 1200 pa (lt1884/LT1885) 0 c < t a < 70 c l 1600 pa C40 c < t a < 85 c l 1900 pa d cmrr common mode rejection match (notes 7, 9) l 104 125 db d psrr positive power supply rejection match v ee = 0, v cm = 1.5v (notes 7, 9) 0 c < t a < 85 c, 2.7v < v cc < 32v l 104 126 db t a = C 40 c, 3v < v cc < 32v 104 126 db electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. split supply operation v s = 15v; v cm = 0v unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage (lt1884a) 25 50 m v 0 c < t a < 70 c l 85 m v C40 c < t a < 85 c l 110 m v input offset voltage (lt1884/LT1885) 30 80 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 150 m v input offset voltage drift (note 6) 0 c < t a < 70 c l 0.3 0.8 m v/ c C40 c < t a < 85 c l 0.3 0.8 m v/ c i os input offset current (lt1884a) 150 300 pa 0 c < t a < 70 c l 400 pa C40 c < t a < 85 c l 500 pa input offset current (lt1884/LT1885) 150 900 pa 0 c < t a < 70 c l 1200 pa C40 c < t a < 85 c l 1400 pa i b input bias current (lt1884a) 150 400 pa 0 c < t a < 70 c l 500 pa C40 c < t a < 85 c l 600 pa input bias current (lt1884/LT1885) 150 900 pa 0 c < t a < 70 c l 1200 pa C40 c < t a < 85 c l 1400 pa input noise voltage 0.1hz to 10hz 0.4 m v p-p e n input noise voltage density f = 1khz 9.5 nv/ ? hz i n input noise current density f = 1khz 0.05 pa/ ? hz v cm input voltage range v ee + 1.0 v cc C 1.0 v l v ee + 1.2 v cc C 1.2 v cmrr common mode rejection ratio C13.5v < v cm < 13.5v l 114 130 db
lt1884/LT1885 5 symbol parameter conditions min typ max units + psrr positive power supply rejection ratio v ee = C15v, v cm = 0v; 1.5v < v cc < 18v l 114 132 db C psrr negative power supply rejection ratio v cc = 15v, v cm = 0v; C1.5v < v ee < C18v l 106 132 db minimum operating supply voltage l 1.2 1.35 v a vol large-signal voltage gain r l = 10k; C13.5v < v out < 13.5v 1000 1600 v/mv l 700 v/mv r l = 2k; C13.5v < v out < 13.5v 250 420 v/mv l 175 v/mv r l = 1k; C12v < v out < 12v 100 230 v/mv l 75 v/mv v ol output voltage swing low no load l 20 40 mv (referred to v ee )i sink = 100 m a l 25 50 mv i sink = 1ma l 70 150 mv i sink = 5ma l 270 600 mv v oh output voltage swing high no load l 160 220 mv (referred to v cc )i source = 100 m a l 160 230 mv i source = 1ma l 180 300 mv i source = 5ma l 360 600 mv i s supply current per amplifier v s = 15v 0.85 1.1 ma l 1.6 ma i sc short-circuit current v out short to v ee l 15 50 ma v out short to v cc l 15 30 ma gbw gain-bandwidth product f = 20khz 1.5 2.2 mhz t s settling time 0.01%, v out = C 5v to 5v, 17 m s a v = C1, r l = 2k sr + positive slew rate a v = C 1 0.5 1.0 v/ m s l 0.4 v/ m s sr C negative slew rate a v = C 1 0.40 0.7 v/ m s l 0.26 v/ m s d v os offset voltage match (lt1884a) (note 7) 35 70 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 160 m v offset voltage match (lt1884/LT1885) (note 7) 35 125 m v 0 c < t a < 70 c l 175 m v C40 c < t a < 85 c l 235 m v offset voltage match drift (note 6, 7) l 0.4 1.1 m v/ c d i b + noninverting bias current match (notes 7, 8) 200 600 pa (lt1884a) 0 c < t a < 70 c l 700 pa C40 c < t a < 85 c l 850 pa noninverting bias current match (notes 7, 8) 240 1200 pa (lt1884/LT1885) 0 c < t a < 70 c l 1600 pa C40 c < t a < 85 c l 1900 pa d cmrr common mode rejection match (notes 7, 9) l 106 125 db d +psrr positive power supply rejection match v ee = C15v, v cm = 0v, 1.5v < v cc < 18v, l 108 124 db (notes 7, 9) d C psrr negative power supply rejection match v cc = 15v, v cm = 0v, C 1.5v < v ee < C18v, l 102 132 db (notes 7, 9) the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. split supply operation v s = 15v; v cm = 0v unless otherwise noted. (note 5) electrical characteristics
lt1884/LT1885 6 note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: the inputs are protected by back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: the lt1884c/LT1885c and lt1884i/LT1885i are guaranteed functional over the operating temperature range of C 40 c to 85 c. note 5: the lt1884c/LT1885c are designed, characterized and expected to meet specified performance from C 40 c to 85 c but are not tested or qa sampled at these temperatures. lt1884i is guaranteed to meet specified performance from C 40 c to 85 c. note 6: this parameter is not 100% tested. note 7: matching parameters are the difference between amplifiers a and b in the lt1884 and between amplifiers a and d and b and c in the LT1885. note 8: this parameter is the difference between the two noninverting input bias currents. note 9: d cmrr and d psrr are defined as follows: cmrr and psrr are measured in m v/v on each amplifier. the difference is calculated in m v/v and then converted to db. electrical characteristics distribution of offset voltage drift typical perfor a ce characteristics uw offset voltage drift ( v/ c) 0.9 0.7 0.5 0.3 0.1 0.1 0.3 0.5 0.7 0.9 percent of units (%) 12 16 20 24 18845 g01 8 4 0 v s = 15v temperature ( c) ?0 ?0 ?0 10 30 50 70 90 110 125 input offset voltage ( v) 50 100 150 200 18845 g02 0 ?0 100 150 200 tempco: 55 c to 125 c 10 representative units i sink (v out ?v ee ) (mv) 500 400 300 200 100 0 10 a 1ma 10ma 18845 g03 100 a 125 c ?5 c 25 c v s = 15v input offset voltage vs temperature v out vs i source v out vs i sink i source (v cc ?v out ) (mv) 500 400 300 200 100 0 10 a 1ma 10ma 18845 g04 100 a 125 c v s = 15v ?5 c 25 c gain vs frequency frequency (hz) gain (db) 140 120 100 80 60 40 20 0 ?0 18845 g05 0.1 1 10 100 1k 10k 100k 1m 10m v s = 15v gain, phase shift vs frequency frequency (hz) voltage gain (db) 100 90 80 70 60 50 40 30 20 10 0 ?0 ?0 phase shift (deg) ?0 ?0 100 110 120 130 140 150 160 170 180 18845 g06 10k 100k 1m 10m phase shift gain
lt1884/LT1885 7 cmrr vs frequency typical perfor a ce characteristics uw psrr vs frequency v n , i n vs frequency frequency (hz) 1 common mode rejection (db) 1k 100k 18845 g07 10 100 10k 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 1m frequency (hz) 1 supply power rejection (db) 1k 100k 18845 g08 10 100 10k 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 1m positive supply negative supply v s = 15v frequency (hz) 1 1 10 100 1000 10 100 1000 18845 g09 voltage noise density (nv/ hz) current noise density (fa/ hz) current noise voltage noise 0.1hz to 10hz noise 0.01hz to 1hz noise slew rate vs temperature noise voltage (o.2 v/div) v s = 15v t a = 25 c time (2s/div) 18845 g10 noise voltage (o.2 v/div) v s = 15v t a = 25 c time (20s/div) 18845 g11 temperature ( c) 50 ?0 ?0 10 30 50 70 90 110 slew rate (v/ s) 1.0 1.2 1.4 18845 g12 0.8 0.6 0.4 rising v s = 15v falling v s = 5v rising v s = 5v falling v s = 15v settling time to 0.01% vs output step settling time ( s) 02 output step (v) 2 6 10 18845 g13 ? ? 0 4 8 ? ? ?0 4 6 8 1012141618 20 v s = 15v a v = ? a v = ? a v = 1 a v = 1 supply voltage (v) 0 supply current (ma) 0.75 1.00 1.25 32 18845 g14 0.50 0.25 0 8 16 4 12 24 20 40 28 36 t a = 85 c t a = 25 c t a = 40 c supply current per amplifier vs supply voltage input bias current vs common mode voltage common mode voltage (v) ?5 input bias current (pa) 250 0 250 0 10 ltxxxx ?tpcxx 500 750 ?000 ?0 5 5 500 750 1000 15 t a = 25 c i bias + i bias
lt1884/LT1885 8 typical perfor a ce characteristics uw channel separation vs frequency gain vs frequency (a v = 1) large-signal response frequency (hz) 100 channel separation (db) 1k 10k 100k 1m 10m 18845 g16 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 110 120 frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 18845 g17 10 0 ?0 ?0 ?0 ?0 v s = 2.5v v s = 15v frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 18845 g18 10 0 ?0 ?0 ?0 ?0 c load = 330pf c load = 150pf c load = 50pf c load = 0pf gain vs frequency vs c load (a v = C 1) frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 18845 g19 10 0 ?0 ?0 ?0 ?0 c load = 500pf c load = 0pf c load = 100pf c load = 300pf gain vs frequency vs c load (a v = 1) v s = 15v r f = r g = 10k a v = C1 18845 g20 small-signal response v s = 15v r f = r g = 10k a v = C1 18845 g21 5v/div 50 m s/div 20mv/div 2 m s/div
lt1884/LT1885 9 the lt1884/LT1885 dual op amp features exceptional input precision with rail-to-rail output swing. slew rate and small-signal bandwidth are superior to other amplifi- ers with comparable input precision. these characteris- tics make the lt1884/LT1885 a convenient choice for precision low voltage systems and for improved ac per- formance in higher voltage precision systems. maintain- ing the advantage of the precision inherent in the amplifier depends upon proper applications circuit design and board layout. preserving input precision preserving the input voltage accuracy of the lt1884/ LT1885 requires that the applications circuit and pc board layout do not introduce errors comparable to or greater than the 30 m v offset. temperature differentials across the input connections can generate thermocouple voltages of 10s of microvolts. pc board layouts should keep connec- tions to the amplifiers input pins close together and away from heat dissipating components. air currents across the board can also generate temperature differentials. the extremely low input bias currents, 100pa, allow high accuracy to be maintained with high impedance sources and feedback networks. the lt1884/LT1885s low input bias currents are obtained by using a cancellation circuit on-chip. this causes the resulting i bias + and i bias C to be uncorrelated, as implied by the i os specification being comparable to the i bias . the user should not try to balance the input resistances in each input lead, as is commonly recommended with most amplifiers. the impedance at either input should be kept as small as possible to mini- mize total circuit error. pc board layout is important to ensure that leakage currents do not corrupt the low i bias of the amplifier. in high precision, high impedance circuits, the input pins should be surrounded by a guard ring of pc board interconnect, with the guard driven to the same common mode voltage as the amplifier inputs. input common mode range the lt1884/LT1885 output is able to swing close to each power supply rail, but the input stage is limited to operat- ing between v ee + 0.8v and v cc C 0.9v. exceeding this common mode range will cause the gain to drop to zero; however, no gain reversal will occur. input protection the inverting and noninverting input pins of the lt1884/ LT1885 have limited on-chip protection. esd protection is provided to prevent damage during handling. the input transistors have voltage clamping and limiting resistors to protect against input differentials up to 10v. short tran- sients above this level will also be tolerated. if the input pins may be subject to a sustained differential voltage above 10v, external limiting resistors should be used to prevent damage to the amplifier. a 1k resistor in each input lead will provide protection against a 30v differential voltage. capacitive loads the lt1884/LT1885 can drive capacitive loads up to 300pf when configured for unity gain. the capacitive load driving capability increases as the amplifier is used in higher gain configurations. capacitive load driving may also be increased by decoupling the capacitance from the output with a small resistance. input bias currents while it may be tempting to seek out a jfet amplifier for low input bias current, remember that bipolar devices improve with temperature while jfets degrade. applicatio s i for atio wu uu
lt1884/LT1885 10 u package descriptio dimensions in inches (millimeters) unless otherwise noted. n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n8 1098 0.100 (2.54) bsc 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
lt1884/LT1885 11 u package descriptio dimensions in inches (millimeters) unless otherwise noted. information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
lt1884/LT1885 12 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com ? linear technology corporation 2000 18845fs, sn18845 lt/tp 0400 4k ? printed in usa part number description comments lt1112 dual picoamp input op amp v os = 60 m v max lt1114 quad picoamp input op amp v os = 60 m v max lt1167 gain programmable instrumentation amp gain error = 0.08% max lt1490 micropower rail-to-rail input and output op amp over-the-top tm common mode range lt1793 low noise jfet op amp i b = 10pa max lt1881/lt1882 picoamp input rail-to-rail output op amp lower input bias currents than lt1884/LT1885 ltc2050 zero drift op amp in sot-23 v os = 3 m v max, rail-to-rail output over-the-top is a trademark of linear technology corporation. 16-bit voltage output dac on 5v supply ?v 5v 33pf v out 4.096v to 4.096v ltc 1597 dac + lt1884 + lt1884 18845 ta02 ?v r com r ofs ref r1 5v 1.65k lt1634 4.096v 5v related parts u typical applicatio

▲Up To Search▲

Price & Availability of LT1885

	To Download LT1885 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .